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MC74LVX139 Dual 2-to-4 Decoder/ Demultiplexer
The MC74LVX139 is an advanced high speed CMOS 2-to-4 decoder/ demultiplexer fabricated with silicon gate CMOS technology. When the device is enabled (E = low), it can be used for gating or as a data input for demultiplexing operations. When the enable input is held high, all four outputs are fixed high, independent of other inputs. The inputs tolerate voltages up to 7 V, allowing the interface of 5 V systems to 3 V systems.
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16 9
* * * * * * * * * * *
High Speed: tPD = 6.0 ns (Typ) at VCC = 3.3 V Low Power Dissipation: ICC = 4 (Max) at TA = 25C High Noise Immunity: VNIH = VNIL = 28% VCC Power Down Protection Provided on Inputs Balanced Propagation Delays Designed for 2 V to 3.6 V Operating Range Low Noise: VOLP = 0.5 V (Max) Pin and Function Compatible with Other Standard Logic Families Latchup Performance Exceeds 300 mA ESD Performance: HBM > 2000 V; Machine Model > 200 V Chip Complexity: 100 FETs or 25 Equivalent Gates
SOIC-16 D SUFFIX CASE 751B
LVX139 AWLYYWW
1 8
16
9
TSSOP-16 DT SUFFIX CASE 948F
LVX139 AWLYWW
1 8 9
16
SOIC EIAJ-16 M SUFFIX CASE 966 Ea A0a A1a Y0a Y1a Y2a Y3a GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC Eb A0b A1b Y0b Y1b Y2b Y3b
LVX139 ALYW
1 8
A = Assembly Location WL or L = Wafer Lot YY or Y = Year WW or W = Work Week
ORDERING INFORMATION
Device MC74LVX139D Package SO-16 SO-16 TSSOP-16 Shipping 48 Units/Rail 2500 Units/Reel 96 Units/Rail
Figure 1. Pin Assignment FUNCTION TABLE
Inputs E H L L L L A1 X L L H H A0 X L H L H Y0 H L H H H Outputs Y1 Y2 H H L H H H H H L H Y3 H H H H L
MC74LVX139DR2 MC74LVX139DT MC74LVX139DTR2 MC74LVX139M MC74LVX139MEL
TSSOP-16 2000 Units/Reel SO EIAJ-16 48 Units/Rail
SO EIAJ-16 2000 Units/Reel
(c) Semiconductor Components Industries, LLC, 2001
1
April, 2001 - Rev. 1
Publication Order Number: MC74LVX139/D
MC74LVX139
A0a A1a 2 3 4 5 6 7 Y0a Y1a Y2a Y3a ACTIVE-LOW OUTPUTS
ADDRESS INPUTS
Ea
1
ADDRESS INPUTS
A0b A1b
14 13
12 11 10 9
Y0b Y1b Y2b Y3b ACTIVE-LOW OUTPUTS
Eb
15
Figure 2. Logic Diagram
En Y0
Y1 A0
Y2
Y3 A1
Figure 3. Expanded Logic Diagram (1/2 of Device)
A1a A0a Ea
3 2 1
X/Y 1 2 EN 0 1 2 3
4 Y0a A1a 3 5 Y1a A0a 2 6 Y2a Ea 1 7 Y3a 12 Y0b 11 Y1b A1b 13 10 Y2b A0b 14 9 Y3b Eb 15
0 1
DMUX 0 0 G 3 1 2 3
4 Y0a 5 Y1a 6 Y2a 7 Y3a 12 Y0b 11 Y1b 10 Y2b 9 Y3b
INPUT
A1b 13 A0b 14 Eb 15
Figure 4. IEC Logic Diagram
Figure 5. Input Equivalent Circuit
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MC74LVX139
MAXIMUM RATINGS (Note 1.)
Symbol VCC VIN VOUT IIK IOK IOUT ICC PD TSTG VESD Positive DC Supply Voltage Digital Input Voltage DC Output Voltage Input Diode Current Output Diode Current DC Output Current, per Pin DC Supply Current, VCC and GND Pins Power Dissipation in Still Air Storage Temperature Range ESD Withstand Voltage Human Body Model (Note 2.) Machine Model (Note 3.) Charged Device Model (Note 4.) Above VCC and Below GND at 125C (Note 5.) SOIC Package TSSOP SOIC Package TSSOP Parameter Value -0.5 to +7.0 -0.5 to +7.0 -0.5 to VCC +0.5 -20 $20 $25 $75 200 180 -65 to +150 >2000 >200 >2000 $300 143 164 Unit V V V mA mA mA mA mW C V
ILATCH-UP qJA
Latch-Up Performance
mA C/W
Thermal Resistance, Junction to Ambient
1. Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. 2. Tested to EIA/JESD22-A114-A 3. Tested to EIA/JESD22-A115-A 4. Tested to JESD22-C101-A 5. Tested to EIA/JESD78
RECOMMENDED OPERATING CONDITIONS
Symbol VCC VIN VOUT TA tr, tf DC Supply Voltage DC Input Voltage DC Output Voltage Operating Temperature Range, all Package Types Input Rise or Fall Time VCC = 5.0 V + 0.5 V Output in 3-State High or Low State Characteristics Min 2.0 0 0 -40 0 Max 3.6 5.5 VCC 85 100 Unit V V V C ns/V
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MC74LVX139
DC CHARACTERISTICS (Voltages Referenced to GND)
VCC Symbol VIH Parameter Minimum High-Level Input Voltage Maximum Low-Level Input Voltage High-Level Output Voltage Low-Level Output Voltage Input Leakage Current Maximum Quiescent Supply Current (per package) IOH = -50 A IOH = -50 A IOH = -4 mA IOL = 50 A IOH = 50 A IOH = 4 mA VIN = 5.5 V or GND VIN = VCC or GND Condition (V) 2.0 3.0 3.6 2.0 3.0 3.6 2.0 3.0 3.0 2.0 3.0 3.0 0 to 3.6 3.6 1.0 1.0 1.9 2.9 2.58 2.0 3.0 3.0 0.0 0.1 0.1 0.36 0.1 2.0 Min 0.75 VCC 0.7 VCC 0.7 VCC 0.25 VCC 0.3 VCC 0.3 VCC 1.9 2.9 2.48 0.1 0.1 0.44 1.0 TA = 25C Typ Max -40C TA 85C Min 0.75 VCC 0.7 VCC 0.7 VCC 0.25 VCC 0.3 VCC 0.3 VCC Max Unit V
VIL
V
VOH
V
VOL
V
IIN ICC
A A
IIIII II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I I I I I IIII II IIII II III II I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I III I I I I I IIII II I I I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII II I I IIIII II IIII II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIII IIII II IIII II I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I I I I I II I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
AC ELECTRICAL CHARACTERISTICS Input tr = tf = 3.0 ns
TA = 25C Typ -40C TA 85C Symbol Parameter Test Conditions Min Max Min 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 Max Unit ns tPLH, tPHL Maximum Propagation Delay, A to Y VCC = 2.7 V CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF 8.5 11.0 6.0 8.5 15.0 16.5 10.0 13.0 13.0 16.5 17.8 18.0 12.0 15.0 15.5 18.0 10.0 15.0 10 VCC = 3.3 V 0.3 V VCC = 2.7 V tPLH, tPHL Maximum Propagation Delay, E to Y 8.0 10.0 5.5 7.5 4 ns VCC = 3.3 V 0.3 V 8.2 13.0 10 CIN Maximum Input Capacitance pF Typical @ 25C, VCC = 3.3 V 26 CPD Power Dissipation Capacitance (Note 6.) pF 6. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC/2 (per decoder). CPD is used to determine the no-load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC.
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MC74LVX139
A tPLH Y 50% VCC VCC 50% GND tPHL
Figure 6. Switching Waveform
E
VCC 50% tPHL tPLH 50% VCC GND
Y
Figure 7. Switching Waveform
TEST POINT OUTPUT DEVICE UNDER TEST
CL *
*Includes all probe and jig capacitance
Figure 8. Test Circuit
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MC74LVX139
K t D TOP COVER TAPE P2
P0
10 PITCHES CUMULATIVE TOLERANCE ON TAPE 0.2 mm (0.008") E
A0 SEE NOTE 7. B1 K0 SEE NOTE 7. FOR MACHINE REFERENCE ONLY INCLUDING DRAFT AND RADII CONCENTRIC AROUND B0
F
W
+
B0 P
+
+
D1 FOR COMPONENTS 2.0 mm x 1.2 mm AND LARGER
EMBOSSMENT USER DIRECTION OF FEED
CENTER LINES OF CAVITY
R MIN. TAPE AND COMPONENTS SHALL PASS AROUND RADIUS "R" WITHOUT DAMAGE EMBOSSED CARRIER
*TOP COVER TAPE THICKNESS (t1) 0.10 mm (0.004") MAX.
BENDING RADIUS
EMBOSSMENT
10
MAXIMUM COMPONENT ROTATION TYPICAL COMPONENT CAVITY CENTER LINE
100 mm (3.937") 1 mm MAX
TAPE 1 mm (0.039") MAX
TYPICAL COMPONENT CENTER LINE
250 mm (9.843")
CAMBER (TOP VIEW) ALLOWABLE CAMBER TO BE 1 mm/100 mm NONACCUMULATIVE OVER 250 mm
7. A0, B0, and K0 are determined by component size. The clearance between the components and the cavity must be within 0.05 mm min to 0.50 mm max. The component cannot rotate more than 10 within the determined cavity
Figure 9. Carrier Tape Specifications
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MC74LVX139
EMBOSSED CARRIER DIMENSIONS (See Notes 8. and 9.)
Tape Size
8 mm
B1 Max
4.35 mm (0.179")
D
1.5 mm + 0.1 -0.0 (0.059" ( 0 004 +0.004 -0.0)
D1
1.0 mm Min (0.179") 1.5 mm Min (0.060)
E
1.75 mm 0.1 (0.069 0.004") )
F
3.5 mm 0.5 (1.38 0.002") 5.5 mm 0.5 (0.217 0.002")
K
2.4 mm Max (0.094") 6.4 mm Max (0.252")
P
4.0 mm 0.10 (0.157 0.004") 4.0 mm 0.10 (0.157 0.004") 8.0 mm 0.10 (0.315 0.004") 4.0 mm 0.10 (0.157 0.004") 8.0 mm 0.10 (0.315 0.004") 12.0 mm 0.10 (0.472 0.004") 16.0 mm 0.10 (0.63 0.004")
P0
4.0 mm 0.1 (0.157 0.004") )
P2
2.0 mm 0.1 (0.079 0.004") )
R
25 mm (0.98")
T
0.6 mm (0.024)
W
8.3 mm (0.327)
12 mm
8.2 mm (0.323")
30 mm (1.18")
12.0 mm 0.3 (0.470 0.012")
16 mm
12.1 mm (0.476")
7.5 mm 0.10 (0.295 0.004")
7.9 mm Max (0.311")
16.3 mm (0.642)
24 mm
20.1 mm (0.791")
11.5 mm 0.10 (0.453 0.004")
11.9 mm Max (0.468")
24.3 mm (0.957)
8. Metric Dimensions Govern-English are in parentheses for reference only. 9. A0, B0, and K0 are determined by component size. The clearance between the components and the cavity must be within 0.05 mm min to 0.50 mm max. The component cannot rotate more than 10 within the determined cavity
t MAX
1.5 mm MIN (0.06") 20.2 mm MIN (0.795")
13.0 mm 0.2 mm (0.512" 0.008")
A
50 mm MIN (1.969")
FULL RADIUS
G
Figure 10. Reel Dimensions
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MC74LVX139
REEL DIMENSIONS
Tape Size 8 mm 8 mm 12 mm 16 mm 24 mm T&R Suffix T1, T2 T3, T4 R2 R2 R2 A Max 178 mm (7") 330 mm (13") 330 mm (13") 360 mm (14.173") 360 mm (14.173") G 8.4 mm, +1.5 mm, -0.0 (0.33" + 0.059", -0.00) 8.4 mm, +1.5 mm, -0.0 (0.33" + 0.059", -0.00) 12.4 mm, +2.0 mm, -0.0 (0.49" + 0.079", -0.00) 16.4 mm, +2.0 mm, -0.0 (0.646" + 0.078", -0.00) 24.4 mm, +2.0 mm, -0.0 (0.961" + 0.078", -0.00) t Max 14.4 mm (0.56") 14.4 mm (0.56") 18.4 mm (0.72") 22.4 mm (0.882") 30.4 mm (1.197")
DIRECTION OF FEED
BARCODE LABEL POCKET HOLE
Figure 11. Reel Winding Direction
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MC74LVX139
CAVITY TAPE
TOP TAPE
TAPE TRAILER (Connected to Reel Hub) NO COMPONENTS 160 mm MIN
COMPONENTS
TAPE LEADER NO COMPONENTS 400 mm MIN
DIRECTION OF FEED
Figure 12. Tape Ends for Finished Goods
User Direction of Feed
Figure 13. TSSOP and SOIC R2 Reel Configuration/Orientation
TAPE UTILIZATION BY PACKAGE
Tape Size 8 mm 12 mm 16 mm 24 mm 8-Lead 14-, 16-Lead 18-, 20-, 24-, 28-Lead 8-, 14-, 16-Lead 20-, 24-Lead 48-, 56-Lead 8-, 14-, 16-Lead 20-, 24-Lead 48-, 56-Lead SOIC TSSOP QFN SC88A / SOT-353 SC88/SOT-363 5-, 6-Lead
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MC74LVX139
PACKAGE DIMENSIONS
SOIC-16 D SUFFIX CASE 751B-05 ISSUE J
-A-
16 9 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A B C D F G J K M P R MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019
-B-
1 8
P
8 PL
0.25 (0.010)
M
B
S
G F
K C -T-
SEATING PLANE
R
X 45 _
M D
16 PL M
J
0.25 (0.010)
TB
S
A
S
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MC74LVX139
PACKAGE DIMENSIONS
TSSOP-16 DT SUFFIX CASE 948F-01 ISSUE O
16X K REF
0.10 (0.004) 0.15 (0.006) T U
S
M
TU
S
V
S
K
16
2X
L/2
9
J1 B -U-
L
PIN 1 IDENT. 1 8
SECTION N-N J
N 0.15 (0.006) T U
S
0.25 (0.010) M
A -V- N F DETAIL E
C 0.10 (0.004) -T- SEATING
PLANE
H D G
DETAIL E
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CCC CCC EE CCC EE
K1
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 --1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.18 0.28 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.193 0.200 0.169 0.177 --0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.007 0.011 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_
-W-
MC74LVX139
PACKAGE DIMENSIONS
SOIC EIAJ-16 M SUFFIX CASE 966-01 ISSUE O
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018).
16
9
LE Q1 E HE M_ L DETAIL P
1
8
Z D e A VIEW P
c
b 0.13 (0.005)
M
A1 0.10 (0.004)
DIM A A1 b c D E e HE L LE M Q1 Z
MILLIMETERS MIN MAX --2.05 0.05 0.20 0.35 0.50 0.18 0.27 9.90 10.50 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 --0.78
INCHES MIN MAX --0.081 0.002 0.008 0.014 0.020 0.007 0.011 0.390 0.413 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 --0.031
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MC74LVX139/D

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